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RTL and FPGA based System Designer

NQR Code:QG-5.5-EH-04147-2025-V1-IITG

  • Old Code: QG-5.5-EH-04147-2025-V1-IITG

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About this Qualification

Job Description

This course is aimed at providing the front-end knowledge of VLSI systems design including FPGA implementation of learner’s design. RTL design and FPGAs can contribute to environmental sustainability in various ways, primarily through their impact on power efficiency, resource utilization, and flexibility.

Eligibility Criteria

Criteria 1 Criteria 2 Experience Training Qualification
4 year UG degree Completed No Experience None
2 year Diploma after 12th Completed 1.5 Years None
Previous NSQF qualification of Level 5 1.5 Years Equivalent

Progression Pathway

  • RTL Design Engineer
  • FPGA Engineer

Learning Module In Job Role/Qualifcation

National Occupation Standards (NOS)/Module NOS Code Mandatory/ Optional Estimated size (Hours) Nos Credit Level
VLSI Digital Integrated Circuits IITG/VLSI05/NoS/001 Mandatory 60 2 5
VLSI System Design IITG/VLSI05/NoS/002 Mandatory 60 2 5
VLSI DSP IITG/VLSI05/NoS/003 Mandatory 60 2 5
Hardware description Language IITG/VLSI05/NoS/004 Mandatory 150 5 5
High Level Synthesis IITG/VLSI06/NoS/002 Mandatory 90 3 5.5
FPGA Implementation IITG/VLSI06/NoS/003 Mandatory 120 4 5.5
Employability Skills DGT/VSQ/N0102 Mandatory 60 2 5.5