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Fundamentals of Design for Testability for VLSI Circuits

NQR Code:NG-05-EH-02907-2024-V1-NIELIT

  • Old Code: NG-05-EH-02907-2024-V1-NIELIT

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About this Qualification

Job Description

The standalone (NOS) focuses on comprehensive testing and fault detection. It includes Design for Test (DFT) strategies to identify manufacturing faults and design defects, utilizing Scan ATPG and Fault Simulation techniques for thorough verification. Key testing modes such as BIST (Built-In Self-Test), MBIST (Memory BIST), and LBIST (Logic BIST) autonomously test circuit components. Boundary Scan technology ensures robust testing of interconnected circuits using specific cells and instructions. Integration with JTAG and IJTAG standards provides standardized interfaces and procedural languages for efficient testing and control. Overall, the standalone NOS enhances VLSI design reliability and manufacturability through advanced testing methodologies and standardized frameworks.

Eligibility Criteria

Criteria 1 Criteria 2 Experience Training Qualification
UG 2nd year In relevant field No Experience None
3 year Diploma after 10th In relevant field 1.5 Years None
2 year Diploma after 12th In relevant field 1.5 Years None
Previous NSQF qualification of Level 4.5 1.5 Years None
Previous NSQF qualification of Level 4 1.5 Years None

Progression Pathway

  • Design Engineer->Application Engineer->Team Lead -> Project Manager

Learning Module In Job Role/Qualifcation

National Occupation Standards (NOS)/Module NOS Code Mandatory/ Optional Estimated size (Hours) Nos Credit Level
Fundamentals of Design for Testability for VLSI Circuits NIE/ELE/N0120 Mandatory 60 2 5